2012年12月11日星期二

IBM details 3-D server chip stacks


IBM hope against hope provide a deeper look into its exert yourself on 3-D imperfection stacks by the International Electron diplomacy summit (IEDM) at this time, detailing exert yourself on stacks of 45-nm member of staff serving at table processors with reminiscence and transceivers.

Extensive Blue has lengthy been probable to be located surrounded by the the first part of users of 3-D stacking to match up its member of staff serving at table CPUs with memories on behalf of performance and power advantages. It has been collaborating with Micron on the Hybrid reminiscence Cube, a reminiscence stack on behalf of scarcely such applications.

As scaling saturates, and lithography sputters to a grinding halt, these orthogonal scaling techniques hope against hope take for granted even supplementary magnitude and last to keep Moore’s ‘law’ alive,” wrote Subraman S. Iyer, a senior IBM technologist all the rage the IEDM paper to be located presented Wednesday (Dec. 12).

The paper shows IBM’s road plot extending from embedded DRAM to various 3-D stacks with and exclusive of interposers using face-to-face and back-to-back stacks. All the rage a separate paper, IBM disclosed the top two layers of metal all the rage its in mint condition 22-nm process are optimized on behalf of function with through silicon vias looked-for on behalf of 3-D stacks.

Embedded DRAM, 3D stacking, interposers and wafer-to-wafer integration are intrinsic to this [IBM] roadmap,” Iyer’s paper understood.




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